Archive for the Category "EAMTA 2015".

Schedule and Poster Sessions CAMTA 2015 Now available

Miércoles, Julio 22nd, 2015

The schedule and list of accepted paper is now available. More information

Lunch vouchers (Registration)

Sábado, Julio 18th, 2015

Lunch Vouchers

The local organizing comittee is working to offer a lunch for every day at low cost for students.
Please complete form below to register for the lunch vouchers.

Registration is closed.

Lodging and Accommodations

Viernes, Junio 19th, 2015

Lodging and Accommodations

The local organizing comittee is working to offer a common hosting for students.
Below is a list of suggested hotels for general visitors.

Hotel Howard Johnson - Av. Hipólito Yrigoyen – Cuatro Estrellas
(0353) 4618000 – reservasvm@cetsa.com.ar
http://www2.hojoar.com/hoteles/hotel.php?idhotel=19

Hotel Le Parc - Corrientes 1236 – Cuatro Estrellas
(0353) 4548200/ 4548091
http://leparchotelvillamaria.com/

Samarán Suites Bv. Sarmiento 1632 – Tres Estrellas
(0353) 4532846 info@samaransuites.com.ar/gerencia@samaransuites.com.ar
http://www.samaransuites.com.ar/

Hotel República – 9 de Julio 58 – Cuatro Estrellas
(0353) 4535500 – administracion@hotelrepublicavm.com.ar/info@hotelrepublicavm.com.ar
www.hotelrepublicavm.com.ar

City Hotel – Buenos Aires 1184 – Tres Estrellas
(0353) 4534322 – cityhotel@arnet.com.ar

Hotel Presidente – San Martín 165 – Tres Estrellas
(0353) 4533670 hotelpres@arnet.com.ar
http://www.hotelpresidentevm.com.ar/

Hotel San Martín – Av. Hipólito Yrigoyen 127 – Dos Estrellas
(0353) 4534716 – hotelsanmartinvm@hotmail.com

Gran Hotel Orión – Chile 222 – Tres Estrellas
(0353) 4535335 – granhotelorion@hotmail.com
http://www.hotelgranorion.com/index.html

Amerian Villa María Park Hotel- Dirección: Ruta Nac. Nº 158 – Cuatro Estrellas
Teléfono: (353) 452-4705
http://www.amerian.com/hotel-amerian-villa-maria-park-hotel

Hotel Alcázar - Bv. Alvear 787 – Dos Estrellas
(0353) 4525948

Hotel Antares – Bv. Alvear 191 – Dos Estrellas
(0353) 4524444

Hotel San Remo – Bv. Alvear 593 – Dos Estrellas
(0353) 4521750 – hotelsanremo@hotmail.com
http://www.hotelsanremovillamaria.com/

Hotel Alem Av. Leandro N. Alem 900 esq. Teniente Ibáñez – Dos Estrellas
(0353) 4521096 – hotelalem900@hotmail.com
http://hotelalem.blogspot.com.ar/

Hotel Amanecer – Av. Leandro N. Alem 172
(0353) 4529836 – residencial-amanecer@hotmail.com

Hotel Colón – San Martín 141
(0353) 4521206 – granhotelcolonvm@hotmail.com.ar
http://granhotelcolon.blogspot.com

Hostería Boulevard – Bv. Vélez Sarsfield 1465
(0353) 4548678 – info@hosteríaboulevard.com.ar

Hostería Ruta 9 – Ruta Nac. Nº 9 Km 562
(0353) 4533715-4523762 – juanmanuelpedernera@hotmail.com

La Casona del Poeta – Lisandro de la Torre 288
(0353) 4549304 – lacasonadelpoeta@hotmail.com
www.lacasonadelpoeta.blogspot.com

Apart Hotel Sarmiento Bv. Sarmiento 1951
(0353) 4525494 – aparthotelsarmiento@gmail.com
www.aparthotelsarmiento.blogspot.com

Hotel Continental – Corrientes 1150
(0353) 4533257

Hotel San Carlos – Bv. España 552
(0353) 4534684

Residencial Alvear – Av. Alvear 578
(0353) 4535139

Hotel Milenium – Bv Argentino 1647
(0353) 4524133 – hotelmileniumvm@gmail.com
www.hotelmileniumvm.com.ar

Payment Method

Martes, Junio 16th, 2015

PAYMENT METHOD


Registration fees:

Description

EAMTA (*)

EAMTA + Social Lunch (*)

CAMTA

Degree Student

AR$300

AR$350

Degree Student IEEE member

AR$250

AR$300

PhD or MSc Student

AR$450

AR$500

PhD or MSc Student IEEE member

AR$400

AR$450

Professional (not student)

AR$900

AR$1000

Professional (not student) IEEE member

AR$800

AR$900

Full (**)

US$300

US$300

US$300

Full for IEEE members (**)

US$270

US$270

US$270

(*) – Include CAMTA

(**) – Requiered for Regular Paper


Para participantes nacionales:

- Por transferencia bancaria a:

BANCO: CREDICOOP COOPERATIVO LIMITADO – SUCURSAL VILLA MARIA
TITULAR: ASOCIACION COOPERADORA DE LA UTN – FRVM
CBU: 1910112755011200412928
CUIT Nº: 30-70025435-2

Luego de realizar el pago envíe una imagen (fotografía o digitalización) del comprobante a eamta.ar(at)gmail.com con asunto Pago EAMTA 2015, en el cuerpo del mismo indique su nombre completo, DNI, CUIL, título del artículo y los datos de facturación que necesite.


Para participantes nacionales que deban realizar pago en dólares, tienen que tomar la cotización del dólar venta del Banco de la Nación Argentina al día del pago.


International attendees:


- Wire transfer:

PAYMENT INSTRUCTIONS / INSTRUCCIONES DE PAGO:
PAY TO / PAGAR A : ASOC COOP UTN F R V MARIA
ACCOUNT NBR: / CUENTA NRO: 112-4129/2
WITH / CON: BANCO CREDICOOP C.L. – BUENOS AIRES.
SWIFT ADDRESS / DIRECCION SWIFT: BCOOARBA.
THROUGH / A TRAVÉS DE: WELLS FARGO BANK NA. – NEW YORK.
SWIFT ADDRESS / DIRECCION SWIFT: PNBPUS3NNYC.
ABA ROUTING NUMBER:026005092
CHIPS:0509

After the payment, please send the wire transfer’s receipt to eamta.ar(at)gmail.com with a subject Payment EAMTA 2015.


The invoice will be issued to the name of the person who made the payment / La factura se emitirá a nombre de la misma persona que realizó el pago.
If the system asks for a reason, please indicate EAMTA – CAMTA 2015 / Si se solicita motivo: indicar EAMTA- CAMTA 2015

Advanced Analog Design 2

Sábado, Junio 13th, 2015

Analog Design with Synopsys Custom Designer

Maximum limit of participants: 30

Objectives

  • Provide a short overview of analog design basics.
  • Introduce the tools that aid analog designers through a full IC implementation.
  • Deliver lab experiences so users can familiarize with Analog IC Design flow.

Topics

  • Introduction to semiconductors devices and analog design flow.
  • Overview of Synopsys Tools (Design Compiler, Custom Explorer, HSpice, IC Validator, Star RCXT)
  • Using Design Compiler (Schematic Editor, Layout Editor, SAE, etc).
  • Ideal Amplifiers and Amplifiers using Transistors.
  • Generation and Analysis of Curves.
  • Entire Design Flow.
  • vOptional labs and project.

      Synopsys Tools Training Program

      The first day of the workshop is focused on a quick review related to semiconductor devices, the introduction to the analog design and a fast overview of the IC fabrication. The first laboratory experience is based on the usage of “Custom Designer”, specifically the “Schematic Editor” and “SAE” (“Simulation and Analysis Environment”). Simulations like “tran”, “ac” and “dc” are created in this experience.

      The second day is focused on explain the entire analog design process and shows some “Custom Designer” features. The laboratory experience this day is based on the usage of “Layout Editor” to create an amplifier using transistors. This laboratory also includes the first verification step, the “DRC” (“Design Rules Check”) verification, using the “IC Validator” tool. The “op” simulation using “SAE” is used at the final of this experience.

      The third day is focused only in laboratory experiences. The lab 3 is related to generate curves that characterize a device and aid the design process. The lab 4 is the final one and uses the “DRC” verification again and adds a new step, the “LVS” (“Layout Versus Schematic”) verification. This new step is also implemented using the “IC Validator” tool. After these verifications, the extraction of parasitic RCs for the interconnections is performed using the “Star RCXT” tool. Finally this data is used to perform post-layout simulations.

      Lecturers

      -Ing. Victor Grimblatt, Synopsys Inc., Chile.
      -Ing. Ronald Valenzuela, Synopsys Inc., Chile.
      -Ing. Esteban Viveros, Synopsys Inc., Chile.

      Class materials

      All the material will be provided to students during the EAMTA.

Advanced Digital Design

Sábado, Junio 13th, 2015

Advanced Digital Design

Maximum limit of participants: 30

Objectives

To prepare the student to be an entry-level industrial standard cell ASIC designer.
To give the student an understanding of issues and tools related to ASIC design and implementation including timing, performance and power optimization, verification and manufacturing test.
To give students the understanding, theory, and tools necessary to design large-scale digital system VLSI design for architectures that have millions or billions of transistors.
To use a Hardware Design Language (Verilog) for digital design.
To understand different design metrics: component/gate count and implementation area, switching speed, energy dissipation and power.

Topics

Introduction to digital world and ASIC design flow
Design of digital hardware using Verilog HDL
Finite State Machines
Timing Design
Hierarchy and Partitioning
Low Power Design
Test Benches and Verification

Labs

The track considers labs where the students will develop specific modules using Verilog and state-of-art design tools.

Lecturers

- Ing. Juan Pablo Moreno, Synopsys Inc., Chile.
- Ing. Gonzalo Fernandez, Synopsys Inc., Chile.
- Ing. Victor Grimblatt, Synopsys Inc., Chile.

Class materials

All the material will be provided to students during the EAMTA.

Bibliography

M.D. Ciletti, “Advanced Digital Design with the Verilog HDL,” (Prentice Hall), 2003. ISBN 0-13-089161-4.
D.R. Smith and P.D. Franzon, “Verilog Styles for Synthesis,” (Pearson Education [Prentice Hall]), 2000.ISBN. 0-201-61860-5.
Thomas and Moorby, “The Verilog Hardware Description Language”, 3rd edition, Kluwer Academic. ISBN 0-7923-9723-1.
S. Sutherland, S. Davidman, P. Flake, “System Verilog for Design” (Kluwer), 2004, ISBN 1-4020-7350-8.
H. Bhatnagar, “Advanced ASIC Chip Synthesis Using Synopsys Design Compiler, Physical Compiler, and PrimeTime”, ISBN 0-7923-7644-7.
Samir Palnitkar, “Verilog HDL” (Prentice Hall), 2008. ISBN 0-13-044911-3
John Willimas, “Digital VLSI Desing with Verilog” (Springer), 2008, ISBN 978-1-4020-8445-4

Advanced Analog Design 1

Martes, Junio 9th, 2015

Advanced Analog Design 1

Maximum limit of participants: 30

Topics

Transistor Level CMOS Design (12 hours) More info.
-Dr. Carlos Galup-Montoro, Federal University of Santa Catarina (UFSC), Florianopolis, Brazil.
The main purpose of this topic is the design of integrated circuits for low-voltage and low-power operation.

Design and applications of Gm-C filters in CMOS Technologies (6 hours) More info.
-Dr. Carlos F. Dualibe, Université Mons, Mons, Belgium.
This topic aims to introduce basic and advanced topics on Gm-C filters. It involves not only system-level filter synthesis but also the design of the transconductors building the filter. Besides, a brief introduction to on-chip tuning strategies is presented.

CMOS data Converters (4 hours 30 minutes) More info.
-Dr. Carlos F. Dualibe, Université Mons, Mons, Belgium.
This topic focuses main issues concerning the analysis of data converters. It is aimed for permitting students :

  • to become familiar with ADCs-DACs circuits and architectures in CMOS technologies,
  • to understand the different roles of ADCs-DACs in several applications domains,
  • to get insight on the impact of components imperfections in ADCs-DACs performances.
  • Here course material, will be continuously actualized.

    Basic Design Track

    Domingo, Junio 7th, 2015

    Courses

    Maximum limit of participants: 60

    Tópicos y Docentes

    Introducción al diseño digital
    -Dr. Pedro Julián, Universidad Nacional del Sur, Bahia Blanca, Arg.

    Física de Dispositivos MOS
    -Dr. Adrián Faigón, Universidad de Buenos Aires, CF, Arg.

    Introducción al diseño analógico
    -Dr. Luis Toledo, Universidad Católica de Córdoba, Córdoba, Arg.

    Laboratorios

    El track incluye el trabajo en laboratorio diseñando un circuito integrado, usando software CAD. Habrá un número limitado de vacantes según la disponibilidad de computadoras. Se sugiere inscribirse en este track a aquellos participantes que no tengan experiencia en el diseño de circuitos integrados o no hayan asistido a ediciones previas de la EAMTA.

    Material de clases:

    Material de clases de Pedro Julián, Introduccion a VLSI.

    Filminas y Problemas de VLSI: VLSI_1VLSI_2VLSI_3

    Clases, apuntes y Filminas de Petrashin y Toledo.

    Filminas Toledo

    Libro de dispositivos semiconductores

    Pedro Julián

    Material de Laboratorio:

    Tutoriales para Laboratorio de Track Básico

    Schedule 2015:

    Preliminar Schedule

    Registration

    Viernes, Junio 5th, 2015

    Registration


    Late registration can be asked by mail to eamta.ar (at) gmail.com. Grants are not available now.


    All attendees (school/conference) have to pay the corresponding registration fee, the grants are only for lodging/travel not for registration.

    It is required the payment of the Full Registration of at least one author of each accepted Regular Paper to allow its inclusion in the proceedings of CAMTA. These will be available through IEEE Xplore® after the conference.

    The accepted Student Posters must be covered with the payment of the Student Registration of at least one author of the work. These will be shown during the Posters Sessions in CAMTA. This payment include the possibility of to participate in a course of EAMTA, if the author wants.

    If you wish to assist to the Social Lunch, on Sunday July 26th, it is required the payment of an extra confirmation fee of AR$50/100 as is specified. This payment is not requiered for full registration assistants.

    Description

    EAMTA (*)

    EAMTA + Social Lunch (*)

    CAMTA

    Degree Student

    AR$300

    AR$350

    Degree Student IEEE member

    AR$250

    AR$300

    PhD or MSc Student

    AR$450

    AR$500

    PhD or MSc Student IEEE member

    AR$400

    AR$450

    Professional (not student)

    AR$900

    AR$1000

    Professional (not student) IEEE member

    AR$800

    AR$900

    Full (**)

    US$300

    US$300

    US$300

    Full for IEEE members (**)

    US$270

    US$270

    US$270

    (*) – Include CAMTA

    (**) – Requiered for Regular Paper

    NOTE: Please, before form completion check the track curses preliminar information here.

    Sponsors

    Miércoles, Mayo 20th, 2015

    American Elements, global manufacturer of high purity metals, semiconductors, nanomaterials, sputtering targets for nanoelectronics, sensors, thin films, & MEMS devices