Archive for the Category "CAMTA 2017".

Poster Sessions

Jueves, Julio 6th, 2017

Poster Sessions

CAMTA 2017 poster sessions

Poster sessions will take place on Thursday, July 27 and Friday, July 28 at Biblioteca Central.

New technique for manufacturing memristive systems based on multiferroic oxides

Abstract
A new kind of memristor was developed taking advantage of the interaction between a ferroelectric and a conductive thin film. The design takes advantage of the voltage drop on a conduction channel to locally change the polarization of a ferroelectric film. This in turn alters the resistivity of the previously mentioned channel. The design was patented and then manufactured and characterized, verifying the development.

Lucas Neñer
Laboratorio de Resonancias Magneticas, Centro Atómico Bariloche

Martin Sirena
Laboratorio de Resonancias Magneticas, Centro Atómico Bariloche


Design and Layout of a 100 Msps, 6-bits Current-Steering DAC in 0.5 µm CMOS Technology

Abstract
In this work, a 6-bits current-steering digital-to-analog converter for telecommunications applications was designed, simulated and sent to fabrication in the On Semiconductor C5 process, which was accessible through MOSIS. The DAC was designed to provide differential output of 2 V peak and to operate at a symbol frequency of 100 MHz with an impendance load of 50Ω. The circuit layout size was 610µm x 470µm.

Gustavo Zoireff
Instituto Balseiro

Fabricio Alcalde Bessia
Instituto Balseiro

José Lipovetzky
Instituto Balseiro

Test of 3T Active Pixel Sensors as Ionizing Radiation Detectors in CMOS 0.5µm Technology

Abstract
This work presents the design of a test chip intended to measure the response against ionizing radiation of different flavors of 3T active pixel sensors. Each flavor is made with a different type of p-n junction from the ones available in an standard CMOS process, and also with different type of transistors. The pixel natural discharge rate was measured and also the response to 137Cs gamma rays.

Fabricio Alcalde Bessia
Instituto Balseiro, CONICET

José Lipovetzky
Low Temperature Lab, CAB, CNEA

Martín Perez
Instituto Balseiro, CONICET

Mariano Gomez Berisso
Instituto Balseiro


Band-Pass Biquadratic filter @10.7 MHz using transconductors

Abstract
In this document it is presented the design of a transconductance amplifier using a 90nm technology for its use in a Band- Pass Biquad filter of 6th order, this filter could be used in a receiver before an IF amplifier at 10.7MHz.

Emiliano Jose Alí
Instituto Universitario Aeronautico

Jorge David Peirone
Instituto Universitario Aeronautico


Floating-Point Precision Analysis For Inverse Kinematics Model Of Exoskeleton Implemented In FPGA

Abstract
A System on Chip (SoC) based on FPGA is proposed for the implementation of the control system of the exoskeleton of the right leg. Exoskeletons can be used for force augmentation, for user movement enhancement or for rehabilitation purposes. The proposed exoskeleton is designed to improve the movements for a person with movement disabilities in the right leg. A basic part of the design is the kinematics model consisting of the direct kinematics model which, given the joint configuration calculates the configuration of the end-effector, and the inverse kinematics model which, given the end-effector configuration calculates the joint configuration of the mechanical structure.

The kinematics model is designed in Very High Speed Hardware Description Language (VHDL) with input and output values in floating-point. Fundamental for this design is its precision. In this paper several bit width representations are used for the inputs and outputs and their precisions are compared to one another, taking into consideration the trade-offs in area, performance and power consumption on FPGA.

Marlon Koendjbiharie
Universidade de Brasilia

Daniel Muñoz
Universidade de Brasilia

Carlos Llanos
Universidade de Brasilia

Papers Sessions

Jueves, Julio 6th, 2017

Paper Sessions

CAMTA 2017 paper sessions

Paper sessions will take place on Thursday, July 27 at Teatro Tornavías.

X-ray Micrographic Imaging System Based on COTS CMOS Sensors
Martín Pérez, José Lipovetzky, Fabricio Alcalde Bessia, Mariano Gómez Berisso

Abstract
This paper presents the use of Commercial Off The Shelf CMOS image sensors for the acquisition of x-ray images with high spatial resolution. The x-ray images, with application in biology, electronic components inspection or paleontology research, are obtained with 8 keV photons from a Cu tube. The quantum efficiency of the detector is estimated using attenuation lengths of photons in the sensor, and compared to traditional scintillator conversion layers.
Time: 10:00
Room: Teatro Tornavías

Setup and Calibration of a particle detector based on Charge Coupled Devices
Elodie Tiouchichine, Miguel Sofo Haro, Xavier Bertou, Horacio Arnaldi, Mariano Gomez Berisso, Jeronimo Blostein, Javier Tiffenberg, Martin Perez, Sergio Suarez, Guillermo Fernandez Moroni

Abstract
Thick Charge Couple Devices have proven to be interesting particle detectors. The DAMIC and CONNIE collaborations are using this technology to search for the elastic scattering of a dark matter particle or a neutrino with a silicon nucleus, producing a nuclear recoil. The experiments reach unprecedented sensitivity at low energies (below 100\,eV) by taking advantage of the low readout noise achieved by these devices. The present document describes an experimental setup at the Centro Atómico Bariloche, its noise treatment and its calibration.
Time: 10:20
Room: Teatro Tornavías

Programmable PLL-Based Frequency Synthesizer: Modeling and Design Considerations
Rahael Ronald Noal Souza, Agord De Matos Pinto Junior

Abstract
This work presents the set of structure and operating features for a third-order Charge Pump Phase-Locked Loop CP-PLL-based Frequency Synthesizer for clock generation. For implementation purpose, a new architectural solution for N integer frequency division is proposed considering the particular design requirements in the PLL feedback for operation with different reference input frequencies FREF. The proposed CP-PLL was designed at Cadence Analog Design Environment ADE by applying standard CMOS-based technology (UMC L180). From the PLL settings at simulation environment, circuit level results indicates a settling time TS < 3 µs at power supply VDD = 1.8 V, considering the divide ratio N variation (4-16) for a range of input frequencies (20 to 50 MHz).
Time: 10:40
Room: Teatro Tornavías

Coffee Break (20 minutes)

Integrated Potentiostat for Detection of Chagas Disease
Fabian Torres, Leonardo Agis, Joel Gak, Matías Míguez

Abstract
he design of a low power integrated potentiostat that measures electric current, intended for a Chagas disease detection application is presented. The circuit was designed using 0.6μm XC06 technology from XFAB [1]. This circuit can generate and measure currents from 1 to 10μA with a relative error under 1%. The remaining part of the circuit consumes only 1.5μA. The total silicon area is 0.24mm2 (without pads)
Time: 11:20
Room: Teatro Tornavías

Charge trapping effects on Metal-Gate/High-k/III-V MOS devices assessed through C-V
Sebastián Matías Pazos, Fernando Leonel Aguirre, Felix Palumbo

Abstract
n this work, the differences in the trapping/detrapping characteristics of Metal-Gate/High-k/III-V MOS stacks is experimentally studied by means of the C-V Hysteresis and dynamic stress. Samples under study include the combination of n-InP and n-InGaAs substrates with HfO2 or Al2O3 dielectrics as gate oxides. This allows to assess the impact of both the substrate and the dielectric on the quality of the complete structure. Results show that Al2O3-based stacks exhibit lower overall trapped charge during hysteresis cycles than their HfO2 counterparts. Additionally, InP-based samples introduce a larger amount of defects above the fermi-level when compared to InGaAs samples for positive stress, but with negligible trapping effects when stressing towards inversion, which is a positive indicator in terms of reliability.
Time: 11:40
Room: Teatro Tornavías

Automatic ASET sensitivity evaluation of a custom-designed 180nm CMOS technology Operational Amplifier
Andrés Fontana. Sebastián Pazos, Fernando Aguirre, Félix Palumbo

Abstract
This work presents a SPICE-based automatic ASET sensitivity evaluation of a 180nm CMOS full-custom Operational Amplifier. The set-up uses the well known double exponential current law to inject SET into every sensitive node in the circuit hierarchy. The pulse parameters are obtained according to a previously generated population of particles with randomly assigned energies and species, the node bias condition at the instant of the strike and an empirical model obtained through TCAD simulations. The circuit is evaluated transistor-wise for each ion of the generated database and the output waveforms are processed in time and frequency domain to obtain figures of merit of the hardness of the proposed design on a given radioactive environment. Results allow to identify the most sensitive devices and the expected error rate for the projected application, allowing to conduct hardening techniques during early design stages.
Time: 12:00
Room: Teatro Tornavías

Design and Characterization of a CMOS Two-Stage Miller Amplifier for Ionizing Radiation Dosimetry
Guido Salaya, Mariano Garcia Inza, Sebastián Carbonetto, Adrian Faigon

Abstract
The offset of an operational amplifier -its inability to yield zero output at zero input- is mainly due to an imperfect mismatch between its inputs. If through some physical perturbation on the circuit we could increase this mismatch, the amplified offset measured at the circuit output would be a measure of that perturbation. This is the idea to be tested in this work: the perturbation is exposition to ionizing radiation, the increasing mismatch is got by proper polarization of each one of the MOS transistors at the operational amplifier input while being irradiated, the quantity to be measured: the dose, deposited energy on the matter from the ionizing field.

The work presents a theoretical analysis in order to establish the expected effects of radiation on the different blocks of operational amplifiers, describes the design and fabrication of an integrated circuit to be tested, the design and assembly of a dedicated hardware and software to collect measurement data, and first results.
The fabricated dosimeter in CMOS 0.6 um commercial CMOS technology exhibits a sensitivity of about 60 mV/Gy and resolution of 4 cGy.
Time: 12:20
Room: Teatro Tornavías

CAMTA Lecturers

Jueves, Abril 6th, 2017

Lecturers

CAMTA 2017 speakers

Keynote speaker 1: Julius Georgiou

Prof. Julius Georgiou (University of Cyprus) is a member of the IEEE Circuits and Systems Society, is the Chair of the BioCAS Technical Committee, as well as a member of the IEEE Circuits and Systems Society Analog Signal Processing Technical Committee. He served as the General Chair of the 2010 IEEE Biomedical Circuits and Systems Conference and is the Action Chair of the EU COST Action ICT-1401 on “Memristors-Devices, Models, Circuits, Systems and Applications – MemoCIS”. Prof. Georgiou has been selected as an IEEE Circuits and Systems Society Distinguished Lecturer for 2016-2017. He is also is an Associate Editor of the IEEE Transactions on Biomedical Circuits and Systems and Associate Editor of the Frontiers in Neuromorphic Engineering Journal. He is a recipient of a best paper award at the IEEE ISCAS 2011 International Symposium and at the IEEE BioDevices 2008 Conference. His research interests include Low-power analog and digital ASICs, implantable biomedical devices, bioinspired electronic systems, electronics for space, brain-computer-interfaces (BCIs), memristive devices, inertial and optical sensors and related systems.

Lecture: Microelectronic Systems for Improved Quality of Life
Microelectronic revolutions come in waves that are driven by necessity. Currently, the aging population is creating a need for various kinds of electronic systems to improve their quality of life. These include the restoration of lost functionality via electronic implants, better health screening technology and non-invasive monitoring in the home environment. In this talk I will present work that has been done towards addressing these needs, whether it be through the development of new required building blocks or through the development of more complex systems that combine custom built hardware and software. In particular the talk covers work done towards developing a vestibular implant for balance restoration, a single chip low-power imager for a bionic eye, a cancer screening capsule for detecting early-stage carcinomas in the small intestine and a bio-inspired acoustic scene analysis system.

Day: Thursday, July 27
Time: 09:00
Room: Teatro Tornavías


Keynote speaker 2: Fernando Silveira

Dr. Fernando Silveira (Universidad de la República, Uruguay) received the Electrical Engineering degree from Universidad de la República, Uruguay in 1990 and the MSc. and PhD degree in Microelectronics from Université catholique de Louvain, Belgium in, respectively, 1995 and 2002. He is Professor at Universidad de la República, Uruguay. His research interests are in design of ultra low-power power integrated circuits and systems, in particular with biomedical application.

He has had multiple industrial activities with CCC Medical Devices and NanoWattICs, including leading the design of an ASIC for implantable pacemakers, applied in industrial production and designing analog circuit modules for implantable devices for various companies worldwide (USA, Israel, Europe and Canada). These devices, which are currently on the market or under human clinical evaluation, are mainly related to the cardiovascular and neural fields. Dr. Silveira received the “Distinguished Engineer” award by the Uruguayan Association of Engineers in 2007 and was a member for 2011-2012 of the Distinguished Lecturers Program of the IEEE Circuits and Systems Society.

Lecture: Improving Ultra Low Energy Digital Circuits and their DC/DC Converters
Scaling has reduced the maximum supply voltage of the current generations of integrated circuits down to below the voltage supplied by all kind of batteries. Low energy digital circuits apply even lower voltages, operating in the near or sub-threshold regions. Furthermore, the supply voltage is adjusted on real time according to the processing load and current SoCs apply several voltage domains. This talk presents on-going research activities at the Microelectronics Group of Universidad de la Republica on these fields. On one hand, the basis of ultra low energy, sub-threshold digital circuits are presented. Then it is shown how circuit and device modeling lead to techniques for significant energy reduction. Results are evaluated in a 28nm FD-SOI process. On the other hand, a novel approach, based on charge recycling, for improving efficiency of integrated DC/DC converters used for powering these ultra low energy blocks is discussed. Its application, including validation in experimental prototipes in 130nm Bulk CMOS, will be shown in a novel modular architecture suitable for a wide output voltage range.

Day: Thursday, July 27
Time: 15:00
Room: Auditorio Biblioteca Central


Keynote speaker 3: Fortunato Carlos Dualibe

Prof. Fortunato Carlos Dualibe (Université de Mons, UMONS, Belgium) received the Electrical-Electronic Engineer degree from the Universidad Nacional de Córdoba, Argentina in 1986, and the Licentiate and Ph.D. degrees in applied sciences at the Université Catholique of Louvain, Louvain-la-Neuve, Belgium, in 1994 and 2001, respectively. From 1987 to 1990 he was Technical Supervisor of INTERCORD Video Games. From 1990 to 1994, he was a Research Fellow with the Research Agency of Córdoba (CONICOR). From 1995 to 2006 he was a Full Professor in the Facultad de Ingeniería of the Universidad Católica de Córdoba, Argentina. From December 2006 to June 2009 he joined Freescale Semiconductors (currently NXP) as senior designer in the power management team. From July to August 2009 he was lecturer of the Brazilian MCT training program ‘’IC-Brasil’’ sponsored by Cadence. In September 2009, he has been named full-time Professor at the Université de Mons, Belgium, where he currently leads the analog design team of the Electronics and Microelectronics Department of the UMONS Polytechnic Faculty. Prof. Dualibe’s research interests include design and test of analog and mixed-signal integrated circuits, low-power low-voltage microelectronics, power management and energy harvesting circuits.

Lecture: Wireless power transmission for sustainable electronics (WIPE): main contributions from the European Coperation in Sciences and Technologies (COST) action IC1301.

Wireless Power Transmission (WPT) focus mainly the efficient design for circuits, systems and strategies specially tailored for battery-less systems, battery-free sensors, passive RFID, Near Field Communications (NFC). WIPE is nothing but a set of enabling technologies aimed to foster the internet of things (IoT). Main applications of WIPE techniques are found in different areas such as: Healthcare, Security, Agriculture, Vehicular Industry, Sports and Gaming, Aerospace Industry, Flexible Manufacturing Industry, Structural Health Monitoring.

The European COST action IC1301 (http://www.cost-ic1301.org) brings together RF and mixed-signal circuit and system designers as well as material sciences engineers, from academia and industry and with different backgrounds to:

  1. Provide enhanced circuit and subsystem solutions to increase the efficiency in WPT;
  2. Investigate the use of novel materials and technologies that allow minimizing cost and maximizing integration of the electronics with the targeted applications;
  3. Contribute to standardization and regulation issues related to this research area.

This lecture aims to present to the EAMTA participant main results issued from this research network after three years of cooperative activities.

Day: Thursday, July 27
Time: 18:00
Room: Auditorio Biblioteca Central


Invited speaker 1: Roberto Cibils

Ing. Roberto Manuel Cibils (INVAP SE) is an Electronic Engineer (UTNFRM 1978). He began his career with a fellowship from CONICET in INTEC for the developing of electronic devices using amorphous hydrogenated silicon. From 1984 to 1986 he joined UTNFRSF as an assistant professor of the Systems Engineering career. In 1986 he joined INVAP SE where he developed his professional activity in nuclear and space projects. Among other projects, he participated in the development of the Radiation Monitoring Systems for the ETRR-2 Multipurpose Nuclear Reactor EPC Project, Inshas, Egypt and the OPAL Nuclear Reactor EPC Project, Lucas Heights, Australia. In 2006 he joined the Systems Engineering Staff of ARSAT-1 project for the development of a geostationary communications satellite. He is author of several articles in international journals with reference and international congresses. He is also the author of several national and one international patent on radiation detection devices. He is a reviewer of international publications for the IEEE Transactions on Nuclear Science Journal. Currently he is working on a project for enabling the use of the leading edge technology of commercial electronic components in space missions.

Lecture: Space, the new frontier for the leading edge technology of commercial integrated circuits
Traditionally, satellites used electronic components designed, manufactured and tested according to standards minimizing the failure risk and maximizing their lifetime in spite of the aggressive environmental conditions to which they are exposed throughout their life cycle. The price that is paid for that benefit is not only economical, but also includes important delays and complex purchasing procedures for their supply. However, the main consequence suffered from the use of such components is technological backwardness. The use of electronic components qualified for the space environment implies greater consumption of power, greater mass and much lower processing performance than their equivalent function in commercial quality. The spread of space missions objectives has produced missions that do not have to operate in so harsh environments, neither have the extreme lifetime requirements of classical missions. Then, alternative strategies for the use of not space-qualified electronic components appears. In this talk I will describe all known mechanisms that create vulnerability in the integrated circuits and the conditions that give origin to them throughout all stages of their life cycle (design, supply, storage, assembly, test and operation); which are their common factors and how can they be avoided or mitigated.

Day: Thursday, July 27
Time:14:30
Room: Auditorio Bilbioteca Central


Invited speaker 2: Arnaldo Visintin

Dr. Arnaldo Visintin (UNLP-CONICET) Dr. Arnaldo Visintin obtained his doctorate in Chemical Sciences with Chemical Technology Orientation in 1987 by the Faculty of Exact Sciences of the National University of La Plata. He is principal investigator of CONICET since 2013. He has directed eight doctoral theses and has directed graduate and postgraduate fellows. He is professor at the UNLP of the subject Physical-Chemical Processes applied to the Electrochemical Storage of Energy. His subjects of interest are Electrochemistry, Energy Storage, Hydrogen Technologies, Materials Science and Technology and Lithium Batteries. He has organized multiple scientific meetings and in the last five years has presented several articles in journals on the subject of renewable energies and storage in lithium batteries.

Lecture: Scientific technological developments in energy storage in Lithium batteries: A possibility for Argentina?
Lithium-ion batteries are the most promising devices in energy storage, from low-power mobile applications up to megaprojects. In addition, some types of lithium-ion batteries have good performance for high current consumption in a cyclical way which makes them applicable as power storage devices basically in two fields: electric vehicles and alternative energy.

The state of the art of this type of batteries at the level of basic research and industrial developments will be presented and some development results will be presented for materials for high-performance electrodes for lithium-ion batteries. Capabilities of the order of commercial materials were obtained. As well as design laboratory-scale prototypes of lithium-ion batteries assembled with developed materials.

Finally, a new cooperation project focusing on the synthesis and characterization of active materials for electrodes of lithium ion batteries of direct application on an industrial scale will be presented briefly. Pilot-scale active material production projects in YTEC (YPF-CONICET) and agreements between the National University of La Plata (INIFTA), National University of Córdoba (FAMAF). In addition to associated centers such as the University of Catamarca and recently the CIDMEJU of Jujuy

Day: Thursday, July 27
Time:16:30
Room: Auditorio Bilbioteca Central


Invited speaker 3: Joel Gak

MSc. Joel Gak (UCU) Full Time Professor G.3, Universidad Católica del Uruguay. In 2005, he joined the Electrical Engineer Department, Universidad Católica. Since 2005, he has been involved in research projects in the field of CMOS analog and mixed mode design and high voltage technology.

(M’07) received the M.Sc. and Graduate degrees in electronics engineering from the Universidad Católica, Montevideo, Uruguay, in 2007 and 2010, respectively. In 2011 he become a Ph.D. student in Universidad Nacional del Sur, Bahia Blanca, Argentina

Lecture: ASICS for implantable medical devices
In this presentation the study and development of integrated circuits for the specific case of implantable medical applications, in a 0.6m HV CMOS technology on SOI wafer, is presented. The work contains innovative results obtained from working with circuits for cardiac and other stimulators, and sensors.

First, the technique of bulk degeneration will be presented for the increase of the linear range of OTAs, on which there is shortness of previous work. By means of this technique, it will be shown that lower supply voltages and less distortion can be achieved in comparison with previous published OTAs. An OTA that combines both bulk and source degeneration techniques was implemented and measured, reaching a linear range above 1V with a power supply that varies from 1.8V to 5.5V. As an application example, an amplifier and signal processing circuit was developed for a piezoelectric accelerometer aimed at physical activity estimation in a rate adaptive pacemaker, using Gm-C filters.

Finally, some circuit blocks that implement the concept of safety by being in direct contact with biological tissue, when it comes to stimulating are present. Control systems are described for safe stimulation of tissue in both voltage and current, and even a modified (safe) level shifter.

Day: Thursday, July 27
Time:17:00
Room: Auditorio Bilbioteca Central

Deadlines

Martes, Marzo 21st, 2017

Deadlines

REGULAR papers to be submitted for inclusion in IEEE Xplore
Deadline for submission of papers: March 21 April 9, 2017 April 14, 2017
Notification of acceptance: May 13, 2017
Deadline for submission of final papers: June 13, 2017

STUDENT posters
Deadline for submission of STUDENT posters: March 21 April 9, 2017 April 14, 2017

Submission

Miércoles, Febrero 8th, 2017

Submission

Submission of Regular Papers:

Accepted Regular Papers will be submitted for inclusion in IEEE Xplore and presented during poster sessions during the conference.

Style:
Regular Papers can have up to six pages (US Letter size: 8.5 by 11.0 inches or 215.9 by 279.4 mm) and must strictly adhere, even in the submission phase to the IEEE conference style:

  • To write your paper using MS Word, please use the MS Word template
  • To write your paper using LaTeX, please use the following LaTeX Templates and the BibTeX style:

    If you use LaTeX, be sure to use the template’s conference mode. See template documentation for details. Make sure to eliminate Type 3 fonts from your document BEFORE submission. Refer to the Type 3 Font Info page for details.

If you are having trouble creating your paper, make sure to check the Author Help page and digital tookbox.

The final version should look like this sample file EAMTA style

References:
Make sure references are in the correct format and no info is missing. This is the IEEE reference manual IEEE references. Journal, proceedings and book references should be as follows:

  1. Journals: R. Szewczyk, E. Osterweil, J. Polastre, M. Hamilton, A. Mainwaring, and D. Estrin, “Habitat monitoring with sensor networks,” Communications of ACM, vol. 47, no. 6, pp. 34–40, June 2004.
  2. Conference proceedings: P. Obregon, S. Sondon, S. Sanudo, F. Masson, P. Mandolesi, and P. Julian, “System based on sensor networks for application in forest fire prevention,” in Proc. of Argentine School of Micro-Nanoelectronics, Technology and Applications (EAMTA 2009), San Carlos de Bariloche, Argentine, Oct. 2009, pp. 61–65.
  3. Books: D. Goldberg, Genetic Algorithm: Search, optimization and machine learning, United States: Addison-Wesley, 1989.

Plagiarism:
EAMTA is subject to IEEE policy about plagiarism. If you are uncertain about this topic please read the IEEE plagiarism FAQ page.

All submissions must be done through EasyChair Easychair (EAMTA 2017). Responses to reviewer comments, if required, should be sent to eamta.ar@gmail.com

Submission of Summaries for Student Posters:

Student posters are shorter works made by young researchers, undergraduate, master or PhD. students in the topics of the CAMTA. These shorter works will NOT be submitted for inclusion in IEEExplore but will be presented during poster sessions at CAMTA 2017.

Format of Summaries:
To submit a work as a student poster, send a two page summary using the student poster summary template. Summaries will be subjected to a peer-review selection.

Plagiarism:
CAMTA is subject to IEEE policy about plagiarism. If you are uncertain about this topic please read the IEEE plagiarism FAQ page.

Submit your student poster summary in PDF format in Easychair (EAMTA 2017). Make sure you select the STUDENT paper category.

SUBMISSION CHECKLIST

Before submitting the final version, make sure the following checklist is complete:

  1. Paper size is US letter
  2. There are no page number of other legends
  3. Titles and subtitles are in the right style
  4. Abstract title is bold and italic
  5. Abstract content is bold
  6. Book references are in the right style (book title in italics)
  7. Journal and Conference Proceeding references are in the right style (paper title between quotation marks, journal/proc. name in italics)
  8. Journal and Conference Proceeding references have volume, number, page numbers and year (indicated as vol. 1, no. 1, pp. 3-5, 2005.)
  9. PDF express compatible file generated and output uploaded through Easychair

Creating your PDF eXpress Account

Log in to the IEEE PDF eXpress(TM) site.
First-time users should do the following:

1. Select the New Users – Click Here link.

2. Enter the following:

- 40685X for the Conference ID

- your email address

- a password

3. Continue to enter information as prompted.

An Online confirmation will be displayed and an email confirmation will be sent verifying your account setup.

Previous users of PDF eXpress need to follow the above steps, but should enter the same password that was used for previous conferences. Verify that your contact information

Call For Papers

Lunes, Octubre 3rd, 2016

Call for Papers

The Argentine School of Micro-Nano electronics, Technology and Applications and its associated Conference is a high quality technical forum for researchers, technologists and companies in the fields of micro and nano electronic tecnologies.

The Conference
Papers in the following areas (not limited to) will be accepted:
Micro/Nano Electronics Design, MEMS/NEMS, Device Physics and Modeling, Signal Processing and Sensors, Imaging, optoelectronic devices and systems, Communication circuits and systems, Power Electronics, Sensory Systems, Microfabrication and Packaging, Testing and Verification, Radiation Effects and Tolerant Circuits, Synthesis, Modeling and Simulation, Biomedical Circuits and Systems

Papers can be presented in two categories: six-page Regular Papers, and Student Posters.
All accepted works will be presented during Poster Sessions at CAMTA, and accepted Regular
Papers will be submitted for inclusion in IEEExplore. Students are encouraged to present short works as
Student Posters.

Original Flyer (Please check “deadlines” section for updated dates):

EAMTA/CAMTA 2017 has confirmed date!

Lunes, Octubre 3rd, 2016

EAMTA/CAMTA 2017 will be held at Universidad Nacional de San Martín, General San Martín, Argentina.
The school will take place between 22th and 29th July 2017, while the congress will be held on 27th and 28th July.